HP 1630 family of logic analyzers consists of three models designed to meet the needs of digital design and test engineers. The A and D models differ only in channel width-the HP 1630G has 65 channels, and additional system performance features for time tagging, time-positional charting, and module linkage histograms. State Analysis State listings and waveforms provide displays and windowing of address, data, status, and control line activity. Selectable display modes include binary, octal, decimal, hexadecimal, ASCII, relocation, user-defined mnemonics, and microprocessor-specific mnemonics. You can assign labels, and display and/or trigger on code in terms of relocatable or absolute addresses, or mnemonics.
Timing Analysis Timing waveform diagrams provide simultaneous display of up to 16 channels, with user-definable labels that speed and simplify data evaluation. Wide magnification range, unique glitch display, and direct readout of time between cursors let you quickly adjust parameters to match the application.
Timing Post-processing Automatic time-interval measurements are provided with X and O cursors, with statistical calculations to enhance accuracy. A search-and-then-stop mode, which is called post-processing, stops timing data acquisition if your system violates a timing or sequence condition. System Performance Analysis Meeting system throughput requirements often requires a global look at overall system activity. Time interval, event, and module linkage histograms let you view system hardware and software activity or specific modules of code for performance evaluation. Out-of-spec conditions or bottlenecks stａnd out. The display shows measurement data, including the minimum, maximum, average, and total measurement time.
Interactive Measurements The HP 1630A/D/G's interactive measurement capability allows you to determine whether your system problems are software errors or hardware malfunctions.
Preprocessors A wide selection of preprocessors tailors the HP 1630 logic analyzers to specific microprocessors. Preprocessor interface modules contain circuitry that properly formats data, and they provide connection via a microprocessor socket. Software supplied with preprocessors performs inverse assembly for state displays in the selected microprocessor's mnemonics. Inverse Assembly Program activity displayed in inverse assembly can save many hours in test and debug. No more time-consuming or error-prone conversions from hex because now your measurement listings appear just as you wrote them, making them easy to compare to source-code listings. Fast, Reliable Storage of Setups and Data HP-IB and HP-IL are standard on the HP 1630A/D/G. These interfaces allow the logic analyzer to communicate with a variety of computers, test equipment, and peripherals. A small investment in an HP disc drive allows you to store setups and data. The HP 1630A/D/G can use the HP 9121S/D and HP 9122S/D disc drives as the mass storage device. Hardcopy Output Simplifies Documentation With the HP 2225A ThinkJet printer, you can quickly obtain a copy of any HP 1630A/D/G display. Instead of time-consuming hａnd documentation or inconvenient photography, simply push the PRINT button. In seconds, you have a complete record for your lab notebook. HP 1630A: For Eight-bit Analysis With its 35 channels, the HP 1630A is an economical solution for designs involving eight-bit microprocessors, most of which require 24 channels for address and data. The HP 1630A provides a cost-effective solution and uncompromised measurement performance. In addition to state and timing analysis, the HP 1630A also offers system performance analysis with complete time-interval histogramming, glitch triggering and capture, and post-processing. Most state analyzers offer many levels of triggering, and require you to string the levels together to trigger on the precise term of interest. The HP 1630A provides four powerful resource terms (a, b, c, d) plus the % of each term, and NO STATE and ALL STATES triggering. You may assign an address, data, or status value to any combination of resource terms. Each time the HP 1630A captures a bus transaction, it automatically tests to see whether that term is to be stored, and whether it is a trigger point or a restart term. Therefore, the HP 1630A accomplishes in one level what most other analyzers require three or more levels to accomplish. For designs requiring 16-bit microprocessors, you can easily upgrade your HP 1630A to either an HP 1630 D or HP 1630G. HP 1630D: 16-bit hardware analysis The HP 1630D facilitates hardware analysis and debug of 16-bit microprocessors. The HP 1630A's measurement capability is also available in the HP 1630D, but with additional state and timing channels to meet the needs of 16-bit microprocessors. Total channel count is increased to 43, where eight or 16 of the channels can be used for high-speed timing analysis. Glitch triggering and capture are also increased to eight channels. Finding hardware problems in complex digital systems requires a logic analyzer that has flexible triggering. The ability to trigger the timing analyzer from the state analyzer, or vice versa, is critical. In addition to triggering on patterns from one to 16 channels wide, you can define a simultaneous occurrence of a pattern and a positive or negative edge to assure data registration precisely on entering or exiting the specified pattern. You can also specify a pattern and a glitch on one or more channels. You can trigger on just edges or glitches, and you can define the valid pattern duration. X and O cursors can be moved anywhere on or off screen. You can magnify the trace around either cursor for greater visual resolution. Time intervals are displayed on-screen, independent of magnification and sample period. HP 1630G: 16-bit software analysis With up to 65 channels of state analysis, eight of which can be used for high-speed timing analysis, the HP 1630G is essential for engineers developing 16-bit microprocessor-based products. To verify state execution time, a real-time clock measures the actual time between states, the total time, or the number of unstored states between states in the state listing. After the functional design is complete, the overall performance of the system must be evaluated to ensure that the system is operating efficiently. The HP 1630G's extensive system performance analysis provides qualified histogramming that shows all acquired states of just-executed instructions; module histograms that show the execution time of a subroutine or module; intermodule linkage histograms that show software traffic patterns to determine which module or subroutine is calling another; and time-positional measurements that produce a time-varying profile of system activity where the x-axis is time and the y-axis is the number of calls to a given routine. | ||
